Modern electronic devices contain ever larger numbers of components and increasing degrees of complexity. At the same time, designers are required to fit these components into ever smaller end-products.
These conflicting demands have led to the development of highly-integrated approaches to chip design and packaging. For example, multi-chip modules (MCMs) typically contain multiple integrated circuits (ICs) or semiconductor dies, and possibly discrete components, as well, on a unifying substrate. The MCM can then be assembled as a single component onto a printed circuit board. Some advanced MCMs use a “chip-stack” package, in which semiconductor dies are stacked in a vertical configuration, thus reducing the size of the MCM footprint (at the expense of increased height). Some designs of this sort are also referred to as a “system in package.”
Although IC chips are usually mounted on the surface of an MCM or printed circuit substrate, in some designs an IC may be mounted in a recess in the substrate. For example, U.S. Pat. No. 7,116,557 describes an imbedded component integrated circuit assembly, in which IC components are imbedded within a laminate substrate disposed on a thermally conductive core, which provides a thermal sink. The circuit components are electrically connected to the IC via flexible electrical interconnects, such as flexible wire bonds. An electrically-insulating coating is deposited upon the flexible electrical interconnects and upon the exposed surfaces of the integrated circuit assembly. A thermally-conductive encapsulating material encases the circuit components and the flexible electrical interconnects within a rigid or semi-rigid matrix.
As another example, U.S. Patent Application Publication 2009/0279268 describes a module that includes a first module unit provided at a top surface with a cavity and a second module unit on which one or more electronic devices are mounted. The second module unit is at least partly received in the cavity of the first module unit. The cavity may be formed in a dual-step structure.
U.S. Patent Application Publication 2012/0104623 provides another example, in which a semiconductor substrate has a plurality of different size recesses formed in the substrate to provide a stepped interposer. A conductive via can be formed through the stepped interposer. A first semiconductor die is partially disposed in a first recess, and a second semiconductor die is partially disposed in a second recess. The first semiconductor die is electrically connected to the second semiconductor die through a conductive layer.
Some electrical devices are designed to be trimmed after assembly, for example by removing material from a thick-film resistor with a laser until the desired resistor value is achieved. (A notch cut in the resistor by the laser decreases the width of the film and thereby increases the resistor value.)
In this regard, for instance, U.S. Pat. No. 5,717,245 describes a ball grid array arrangement comprising a dielectric multilayer substrate, in a lower metallization layer of which is disposed an array of solder balls. A passive circuit element is integrated into at least one of the metallization layers. The arrangement may take the form of an IC carrier or multichip-module carrier having transmission structures situated within a central die-attach area of the substrate and having also a peripheral area containing bonding structures for the mounting of at least one chip or chip module. A passive circuit element in the form of an inductor may be formed in the upper metallization layer between adjacent groups of bonding structures. In order to achieve tighter tolerances, a combination of triplate and surface microstrip constructions may be employed to allow trimming and tuning of these components after manufacture, by arranging for the majority of the length of a resonator or filter element to be defined in the triplate format described above, but completing the length with the addition of a short length of microstrip formed in the upper or lower metallization. Laser or abrasive trimming may be employed to adjust the length and resonant behavior of the line.